ARM Cortex-M4 Specifics
In order to get the most from the mikroC PRO for ARM compiler, the user should be familiar with certain aspects of ARM Cortex-M4 MCU. This knowledge is not essential, but it can provide a better understanding of the ARM's capabilities and limitations, and their impact on the code writing as well.
First of all, the user should know that ARM's ALU, which performs arithmetic operations, is optimized for working with 32-bit types. Also, it performs hardware multiplication and division on the integer level,
so the floating multiplication and division is slower and consumes more memory comparing it to the integer.
The ARM supports 64-bit data types, but they are less efficient. They provide higher precision, but lack the code size and the execution.
Nested Calls Limitations
There are no Nested Calls Limitations, except by RAM size. A Nested call represents a function call within the function body, either to itself (recursive calls) or to another function.
Recursive calls, as a form of cross-calling, are supported by mikroC PRO for ARM, but they should be used very carefully.
Also calling functions from interrupt is allowed.
Calling function from both interrupt and main thread is allowed. Be careful because this programming technique may cause unpredictable results if common resources are used in both main and interrupt.
Variable, constant and routine alignment
Simple type variables whose size is 2 bytes are set to alignment 2, those whose size is 4 bytes and larger are set to alignment 4.
Aggregated types are aligned according to the maximal alignment of its member. Routines are always set to alignment 4.
This bit-banding operation greatly simplifies bit manipulations. Instead of reading a word, AND’ing in the appropriate bit, and then writing the word back out, bit-banding accomplishes this with a single store instruction.
But that single instruction has another benefit: it is an atomic operation, executed as a single instruction.
Example of Bit-Banding
Bit-banding uses address space that aliases peripheral or SRAM address space, allowing a single bit within a word to be manipulated by a reference to a byte at an aliased address.
For example, a write to address 0x20000000 modifies the SRAM 32-bit word at that location, but writing to 0x28000000 modifies only bit 0 at address 0x20000000.
With the prior method of bit manipulations with sequential instructions doing the read-modify-write operations, an interrupt could occur which, potentially, could change a bit at that memory location.
After the interrupt returns, the store could be writing corrupt data back to that memory location. The atomic nature of bit-band operations eliminates that problem.
Non-aligned Memory Access
ARM Cortex-M4 allows non-aligned memory access but at a performance loss. Each unaligned access causes multiple bus accesses which will cause slower performance.
The Floating-Point Unit (FPU) fully supports single-precision add, subtract, multiply, divide, multiply and accumulate, and square root operations. It also provides conversions between fixed-point and floating-point data formats, and floating-point constant instructions.
The FPU provides floating-point computation functionality that is compliant with the ANSI/IEEE Std 754-2008, IEEE Standard for Binary Floating-Point Arithmetic, referred to as the IEEE 754 standard. The FPU implements the FPv4-SP floating-point extension.
The Cortex-M4 core has digital signal processing capability in the form of DSP extensions, a single cycle MAC unit and a single precision floating point unit.
The DSP extensions have following features :
- Single cycle 16,32-bit MAC,
- Single cycle dual 16-bit MAC,
- 8,16-bit SIMD arithmetic,
- Hardware Divide (2-12 Cycles).
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